Moderately high speed operation in a digital-to-analog converter (DAC) is often achieved by the use of a multi-bit delta-sigma architecture. Device mismatch in a multi-bit DAC results in output linearity distortion. This distortion may be reduced by the use of a dynamic element matching scheme such as provided by a data weighted averaging algorithm. The prevailing view is that the so-called data weighted averaging (DWA) algorithm provides the best performance in such systems. The DWA algorithm reduces the effects of non-linearities by changing which output elements in a DAC are switched on and off, as described in more detail below. However, as system designs become increasingly larger with greater numbers of bits used to achieve high linearity with a low oversampling rate, these system designs can push the limits of the DWA algorithm. Such system designs are increasingly common in DACs employed in communication equipment. The increased size of the designs is accompanied by nonlinearity due to large amounts of switching energy in the DAC. More specific details are set forth below.
FIG. 1A is a prior art representation of non-data weighted averaging and data weighted averaging control signals to switch DAC output elements for a given input data word. Data word input 110 represents the numeric value of the input word. There are four separate input data words, 3, 1, 5, 4 (all in decimal), represented as a sequence to be output according to two separate conventions, as represented in two separate sets of DAC output elements (OEs), 124 and 134. DAC OEs 124 are controlled by control signal 122 of thermometer decoder 120, which does not employ a DWA algorithm, while DAC OEs 134 are controlled by control signal 132 of dynamic element matching controller (DEM) 130, which employs a DWA algorithm. The input data word for FIG. 1A would be represented by three bits (or M=3), in binary format as 011, 001, 101, and 100. Each box of DAC OEs 124 and 134 represents a single output element of the M-bit DAC, as controlled by a corresponding bit in control signals 122 and 132. As shown, there are 7 unit elements corresponding to the number of bits, M=3.
Shaded boxes indicate an output element that is activated during a sample period. White boxes indicate an output element that is deactivated during a sample period. Alternately, in a differential DAC, shaded boxes indicate output elements coupled to the positive output of the DAC, and white boxes indicate elements coupled to the negative output of the DAC. During the first input, there are three output elements activated according to the input value of three. During the second period there is one output element activated, and so forth. With thermometer decoding without DWA, the output elements are always triggered from the left-most output element to the right. Thus, the left-most output elements are continually triggered to produce an output, while the right-most output elements are triggered less frequently. In a perfectly matched system without process variation or mismatch, switching the same output elements (i.e., the left-most output elements) on and off for each subsequent input would result in consistent performance of the DAC. However, as will be readily appreciated by one skilled in the art, variations in processing integrated circuits (ICs) are unavoidable, and design tolerances actually allow for variance. To achieve the “average” performance expectation provided by the processing variation tolerances, DAC system designers recognize that it is desirable to switch different ones of the output elements, which is the purpose behind the DWA algorithm.
DAC OEs 134 represent the activation sequence for a DAC controlled by a DEM 130 employing a DWA algorithm. The basic principle of the DWA algorithm is to track which output elements are switched on during a first sample, and then switch on output elements representing the output value starting with the first unused output element of the previous sample. For example, as shown, during the first sample the three left-most output elements are activated. During the second sample, the first three output elements are deactivated, and the first unused output element of the previous sample (the fourth) is turned on. During the third sample, the fourth output element is turned off, and five different output elements are turned on starting with the fifth. To activate five different output elements during the third sample period, it is necessary to wrap around to the beginning of the group of output elements, activating the first two output elements. This wrapping behavior is the source of the usage of the term ‘DWA loop.’ During the fourth sample four output elements are activated beginning with the third output element. The DWA algorithm performs an averaging function and causes each output element to be activated approximately as frequently as each other output element. This creates first order noise shaping such that the distortion due to mismatch is transformed into higher-frequency signals that fall outside the signal band. However, the DWA algorithm performs less than ideally as the number of bits is increased.
FIG. 1B is a prior art representation of a data weighted averaging control signal to switch DAC output elements for an input data word having low numeric values. Consider data word input 140 (input values 1, 1, 2, 2), which generates a sequence of DAC outputs for which the transient energy scales with DAC output code, which is that the transient energy will increase linearly with increases in the illustrated input value. Data input word 140 is received by DEM 150, which employs a DWA algorithm to produce control signal 152 to control the DAC OEs 154. Assume that the input is held constant at a binary value of 001, in accordance with the first two input words. At the changing of the clock, one output element is turned off and a different output element is turned on, as shown in DAC OEs 154. Any transient effect due to the deactivation and/or activation of an output element is triggered one time, and in a multiple of one. If the input is then held constant at a binary value of 010, the changing of the clock triggers two output elements to be turned off and two different output elements to be turned on. Any transient effect due to the deactivation and/or activation of an output element is therefore triggered in two output elements, and is present in a multiple of two. Transient energy scales for all inputs as long as the value of the input is half or less than half of the total number or output elements available in the DAC, such that the amount of the transient behavior is in the same multiple as the number of the input. Thus, the behavior of the DAC under the DWA algorithm is linear for input values that require less than half of the total output elements.
FIG. 1C is a prior art representation of a data weighted averaging control signal to switch DAC output elements for an input data word having high numeric values. Note that as used herein, “high” numeric values refers to high relative to the output capability of a DAC on which the output will be produced, and will generally be understood to refer to an input that is larger than one half of the available output elements 174. Thus, consider data word input 160, which has input values of 5, 5, 6, 6. The input words are received at DEM 170, which employs a DWA algorithm to generate control signal 172, which in turn controls DAC OEs 174. With numeric values greater than midscale, the transient energy does not scale with code, but rather decreases with increasing code. Assume that the input is held constant at a binary value of 101, or a decimal value of 5. At the instant of the changing of the clock, only two output elements are deactivated and hence available to be activated on a subsequent sample. Therefore two output elements will be deactivated and two different output elements will be activated. Any transient effect due to the deactivation and/or activation of an output element is therefore present in a multiple of two. Similarly, during such time that the input is held constant at a binary value of 110 (decimal value of 6), at the changing of the clock only one element is currently deactivated and hence available to be activated on a subsequent sample. Therefore one output element will be deactivated and a single different output element will be activated. Any transient effect due to the deactivation and/or activation of an output element is therefore present in a multiple of one. Because the activation sequence is not a consistent multiple of the input code for the whole range of input codes, the sequence causes the generation of a nonlinear output signal. In particular, any time two consecutive inputs whose sum is greater than M, the total number of components in the DAC, there will be a nonlinear component in the output signal. Note that any of DAC OEs 124, 134, 154, and 174 could be the same or different DAC OEs.
FIG. 2A is a representation of a time versus output graph illustrating the output step and transition overshoot of a prior art DAC system. The act of switching the output elements on and off may introduce non-linearity due to transient effects during the activation and/or deactivation of one or more DAC output elements. The switching events can generate more distortion as the sampling frequency rises, given that the switching events will represent a greater portion of the total energy in any DAC output sample. Such transient-based distortion is commonly referred to as “inter-symbol interference” (ISI) because the shape of the next output depends on the value of the previous output.
The graph of FIG. 2A represents an output step 210 for a sequence of input data words constituting a “ramp.” The ramp is a series of inputs whose initial input is zero, and whose value is incremented by one at each interval until the highest possible value is reached, at which time the ramp is concluded. The output of an ideal DAC in response to an input ramp appears as a perfect stair step waveform. However, as shown the non-ideal DAC controlled by a DWA signal produces a transient effect in the form of a transition overshoot 220. Transition overshoot 220 represents a curve illustrating the overshoot of the DAC for the individual input values. Specifically, the amount of overshoot for each input value is arbitrarily depicted to be one-half of the output quantity of the unit element. Therefore if the output amplitude of the unit element is designated to be “one LSB” (least significant bit), then the amount of overshoot is depicted to be “½ LSB.” Observe that the overshoot in the middle of the ramp is much larger than the overshoot at the top or the bottom, as seen on transition overshoot curve 220, which is seen to be more parabolic than linear. Such a transfer characteristic is known to create harmonic distortion, a majority of which is contained in the second harmonic, which places additional strain on an output filter that receives and processes the DAC output signal to be able to provide a “clean” output signal. Note that the ramp input is not the only cause of the distortion illustrated in FIG. 2A. Rather, the nonlinearity occurs on any occasion in which two adjacent samples have a combined value whose value is greater than the total number of output elements in the DAC.
FIG. 2B is a representation of a time versus output graph illustrating the output step and transition overshoot of a prior art DAC system employing 2*2M output elements. Output step 230 as a function of time for a ramp input to a DAC having 2*2M output elements is shown. The ramp input is a series of inputs whose initial input is zero, and whose value is incremented by one at each interval until the highest possible value is reached, at which time the ramp is concluded. Note that output step 230 is linear. Note also that transition overshoot 240 increases throughout the DAC output with time, but is also linear. Contrast the linearity of transition overshoot curve 240 with the nonlinear transition overshoot 220 represented in FIG. 2A. Transition overshoot 240 at each step is linearly related to the size of the step. Thus, the overall linearity of the DAC is greatly enhanced by using 2*2M output elements The linearly increasing transition overshoot 240 has the drawback that signals operating around the higher output range of the DAC will have much more overshoot energy than signals operating in the lower output range.